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Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
566 CHAPTER 12 / MODULE AND BIT-SLICE DEVICES
FIGURE 12.5
Design of a 1-bit slice universal shift register (USR). (a) Operation table for the J th stage. (b) State
diagram for the J th stage. (c) NS logic K-map plotted from (b) assuming the use of D flip-flops.
(d) MUX K-map for D
J
.
operation. The state diagram for the J th stage, shown in Fig. 12.5b, is obtained directly from
the operation table. For example, the branching condition f
ab
is the Boolean sum of all set
producing conditions, each formed by ANDing the mode controls with its corresponding
NS action parameter. Thus, since a set condition can be introduced by a shift right operation,
the term ...
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Publisher Resources

ISBN: 9780126912951