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Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
572 CHAPTER 12 / MODULE AND BIT-SLICE DEVICES
12.3 SYNCHRONOUS BINARY COUNTERS
Synchronous counters form a class of FSMs for which each state code assignment of its state
diagram is taken to be a number in a count sequence. Most simple synchronous counters are
degenerate Moore machines that obey the basic model of Fig. 10.3c, since their only outputs
are the state variables. Other synchronous binary counters are those that have control inputs
and unconditional or conditional outputs, and that adhere to either the Moore or Mealy
model (Fig. 10.4 or 10.5). In any case, such binary counters are classified as modulo-N
counters or as divide-by-N counters, where N is the number of states of the sequence.
The divide-by-N designation results from the fact
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Publisher Resources

ISBN: 9780126912951