Skip to Main Content
Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
614 CHAPTER 13 / ALTERNATIVE SYNCHRONOUS FSM ARCHITECTURES
2. Memory. Choose from the following:
Discrete flip-flops (D, JK, or T that are edge-triggered or master/slave)
Shift registers
Counters
3. Registered PLDs for total state machine design. Choose from the following:
R- and V-type PALs
FPGAs (e.g., Actel and Xilinx)
GALs, EPLDs, PLSs, etc. (see Subsection 7.7.4 for definitions)
4. Input and output conditioning circuits. Choose from the following:
Synchronizers
Synchronizer/stretchers
Debouncing circuits
Output holding (storage) registers for filtering
5. Initialization and reset circuits. Choose from the following:
Sanity circuits
The preceding list of components may not be exhaustive, but it covers most of the
components that are commonly used in modern ...
Become an O’Reilly member and get unlimited access to this title plus top books and audiobooks from O’Reilly and nearly 200 top publishers, thousands of courses curated by job role, 150+ live events each month,
and much more.
Start your free trial

You might also like

Top-Down Digital VLSI Design

Top-Down Digital VLSI Design

Hubert Kaeslin
Engineering Physics

Engineering Physics

S. Mani Naidu
Analog Integrated Circuit Design, 2nd Edition

Analog Integrated Circuit Design, 2nd Edition

Tony Chan Carusone, David A. Johns, Kenneth W. Martin
Analog Circuit Design Volume Three

Analog Circuit Design Volume Three

Bob Dobkin, John Hamburger

Publisher Resources

ISBN: 9780126912951