614 CHAPTER 13 / ALTERNATIVE SYNCHRONOUS FSM ARCHITECTURES
2. Memory. Choose from the following:
Discrete flip-flops (D, JK, or T that are edge-triggered or master/slave)
Shift registers
Counters
3. Registered PLDs for total state machine design. Choose from the following:
R- and V-type PALs
FPGAs (e.g., Actel and Xilinx)
GALs, EPLDs, PLSs, etc. (see Subsection 7.7.4 for definitions)
4. Input and output conditioning circuits. Choose from the following:
Synchronizers
Synchronizer/stretchers
Debouncing circuits
Output holding (storage) registers for filtering
5. Initialization and reset circuits. Choose from the following:
Sanity circuits
The preceding list of components may not be exhaustive, but it covers most of the
components that are commonly used in modern ...