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Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
698 CHAPTER 14 / ASYNCHRONOUS STATE MACHINE DESIGN AND ANALYSIS
of Fig. 8.46 so as to avoid possible fan-in problems. Recall that propagation delay increases
with increasing number of gate inputs. Notice that a reset-dominant basic cell is used as the
memory element in this case.
14.8 DESIGN OF THE RET D FLIP-FLOP BY USING THE LPD MODEL
The RET D flip-flop was previously designed in Subsection 10.7.2 by using the basic cell
as the memory. In this section the same flip-flop will be designed by using the LPD model.
Shown in Fig. 14.14 are the state diagrams for the resolver and set-dominant basic cell
FSMs, both reproduced from Fig. 10.29 for the convenience ...
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Publisher Resources

ISBN: 9780126912951