Skip to Main Content
Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
730 CHAPTER 14 / ASYNCHRONOUS STATE MACHINE DESIGN AND ANALYSIS
FIGURE 14.36
Results of a simulation for the logic circuit in Fig. 14.35 showing the single transition times of the state
variables (dashed lines) that are characteristic of STT machines, the state codes and state identifiers
following each transition, and the output fucntion P and Q.
14.13 HAZARD-FREE DESIGN OF FUNDAMENTAL MODE STATE MACHINES
BY USING THE NESTED CELL APPROACH
Fundamental mode designs of FSMs are fraught with special problems, not the least of
which is that dealing with static hazards in the NS logic. If an s-hazard exits in a NS logic
function, it can, under the right
Become an O’Reilly member and get unlimited access to this title plus top books and audiobooks from O’Reilly and nearly 200 top publishers, thousands of courses curated by job role, 150+ live events each month,
and much more.
Start your free trial

You might also like

Top-Down Digital VLSI Design

Top-Down Digital VLSI Design

Hubert Kaeslin
Engineering Physics

Engineering Physics

S. Mani Naidu
Analog Integrated Circuit Design, 2nd Edition

Analog Integrated Circuit Design, 2nd Edition

Tony Chan Carusone, David A. Johns, Kenneth W. Martin
Analog Circuit Design Volume Three

Analog Circuit Design Volume Three

Bob Dobkin, John Hamburger

Publisher Resources

ISBN: 9780126912951