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Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
PROBLEMS 759
FIGURE P14.1
PROBLEMS
14.1 Problem 10.3 of Chapter 10 deals with the clocked set-dominant basic cell. There,
questions are asked based on an expression that is provided without explanation of
its origin. This exercise provides the basis for this expression together with that for
the clocked reset-dominant basic cell.
Shown in Figs. P14.1a and p14.1b are the state diagrams for the clocked set-
and reset-dominant basic cells, respectively. Notice the similarities with the state
diagrams in Figs. 14.7a and 14.9a.
(1) Use the lumped path delay (LPD) model to obtain an optimum design for
each of these asynchronous FSMs. (Hint: For the reset-dominant ...
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Publisher Resources

ISBN: 9780126912951