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Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
CHAPTER 16
Externally Asynchronous/
Internally Clocked (Pausable)
Systems and Programmable
Asynchronous Sequencers
16.1 INTRODUCTION
Externally asynchronous/internally clocked (EAIC) systems represent a compromise be-
tween the synchronous and asynchronous design methodologies. While functioning asyn-
chronously with respect to the external world, the EAIC system is controlled by a single
internally generated clock signal that is produced when valid outputs exist from each mem-
ory element. In this scheme, input synchronizing registers and memory registers coordinate
to generate the internal clock. The internal clocking of an EAIC system causes it to
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Publisher Resources

ISBN: 9780126912951