868 INDEX
Contracted Reed-Muller transformation (cont.)
Perspective, 229
Subfunction partitioning, 225–228
Controlled inverters. See controlled logic level
conversion
Controlled inversion, 103
Controlled logic level conversion, 103–104
Adder/subtractor designs, 342–343
ALU designs, 374–375
BCD adder/subtractor designs, 387
Binary counter designs, 586–587
Mixed logic interpretation, 103–104
Overflow error detection circuits, 344
Positive logic interpretation, 104
XS3 adder/subtractor designs, 387–388
Controlled system, 349
Data path unit (DPU), 650
Controller
In system-level design, 649–650
Conventional K-maps, 137–158, 167
Conversion between flip-flops, 450–461 (see also
flip-flop conversion)
Conversion between number systems
Algorithms, 38, 39, 41
Fractions, 40–43
Integers, ...