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Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
4.12 WORKED EV K-MAP EXAMPLES 181
Here, tree configuration (III) is expected to show the least delay, but at the cost of greater
design area. Tree configuration (II) would seem to have the most favorable area/delay trade-
off, while gate (I) and cascade configuration (IV) are expected to have the least favorable
trade-off. A dual set of ANDing operations would show the same area/delay trade-offs.
4.11 PERSPECTIVE ON LOGIC MINIMIZATION AND OPTIMIZATION
The EV mapping methods described in Sections 4.6 and 4.7 are useful up to three or
four orders of map compression. However, with increasing compression order beyond
third order, the gap usually widens between the reduced forms obtained and the absolute
minimum result. This is especially true if reduced
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Publisher Resources

ISBN: 9780126912951