Skip to Main Content
Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
194 CHAPTER 4 / LOGIC FUNCTION REPRESENTATION AND MINIMIZATION
FIGURE P.4.4
subfunctions in cells 4 and 7 of function Z by applying the laws of Boolean algebra
while treating the φ as an entered variable.)
(1) By following the example in Fig. 4.33a, construct the first-order submap for each
of the eight cells in each K-map.
(2) Give the canonical SOP and POS expressions in code form for each function.
(3) Extract the minimum SOP and POS forms from each third-order K-map, keeping
in mind the discussion on the use of don’t cares in Subsection 4.6.1.
4.27 Compress the fourth-order K-map in Fig. P4.4 into a second-order K-map (Map
Key =4) and loop out minimum ...
Become an O’Reilly member and get unlimited access to this title plus top books and audiobooks from O’Reilly and nearly 200 top publishers, thousands of courses curated by job role, 150+ live events each month,
and much more.
Start your free trial

You might also like

Top-Down Digital VLSI Design

Top-Down Digital VLSI Design

Hubert Kaeslin
Engineering Physics

Engineering Physics

S. Mani Naidu
Analog Integrated Circuit Design, 2nd Edition

Analog Integrated Circuit Design, 2nd Edition

Tony Chan Carusone, David A. Johns, Kenneth W. Martin
Analog Circuit Design Volume Three

Analog Circuit Design Volume Three

Bob Dobkin, John Hamburger

Publisher Resources

ISBN: 9780126912951