Skip to Content
Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
PROBLEMS 235
(b) Obtain the optimized two-level SOP results for the two functions and compare
them with the results of part (a) by using the gate/input tally (including inverters)
assuming that the inputs and outputs are all active high.
(c) Construct the logic circuits for the circuits of parts (a) and (b).
5.16 (a) Use subfunction partitioning of the following function for CRMT/two-level min-
imization in minterm code. To do this, collapse this function into a third-order
K-map of axes A, B, C and follow the discussion given in Section 5.11. Choose
{A, B, C} as the bond set for the CRMT portion.
F(A, B, C, D, E) =
m(4, 7, 10–12, 14, 16–19, 21, 23, 24–27, 28, 30)
(b) Without partitioning, use the CRMT method to obtain a gate-minimum for this
function. ...
Become an O’Reilly member and get unlimited access to this title plus top books and audiobooks from O’Reilly and nearly 200 top publishers, thousands of courses curated by job role, 150+ live events each month,
and much more.
Start your free trial

You might also like

The Electrical Engineering Handbook

The Electrical Engineering Handbook

Wai Kai Chen
Analog Integrated Circuit Design, 2nd Edition

Analog Integrated Circuit Design, 2nd Edition

Tony Chan Carusone, David A. Johns, Kenneth W. Martin

Publisher Resources

ISBN: 9780126912951