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Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
270 CHAPTER 6 / NONARITHMETIC COMBINATIONAL LOGIC DEVICES
number of bits. As an example, the output expressions for a cascadable 4-bit comparator
become
(A > B) = gt ·
3
i=0
(A
i
B
i
) + A
0
¯
B
0
3
i=1
(A
i
B
i
) + A
1
¯
B
1
3
i=2
(A
i
B
i
)
+ A
2
¯
B
2
(A
i
B
i
) + A
3
¯
B
3
(A = B) = eq ·
3
i=0
(A
i
B
i
) = (A > B) · (A < B)
(A < B) = lt ·
3
i=0
(A
i
B
i
) +
¯
A
0
B
0
3
i=1
(A
i
B
i
) +
¯
A
1
B
1
3
i=2
(A
i
B
i
)
+
¯
A
2
B
2
(A
i
B
i
) +
¯
A
3
B
3
, (6.23)
where
3
i=0
(A
i
B
i
) = (A
0
B
0
)(A
1
B
1
)(A
2
B
2
)(A
3
B
3
)
and
3
i=2
(A
i
B
i
) = (A
2
B
2
)(A
3
B
3
), etc.
Implementation of Eqs. (6.23) is given in Fig. 6.29, using three-level NAND/NOR/EQV
logic and limiting fan-in ...
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Publisher Resources

ISBN: 9780126912951