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Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
6.7 PARITY GENERATORS AND ERROR CHECKING SYSTEMS 273
6.7 PARITY GENERATORS AND ERROR CHECKING SYSTEMS
A parity bit can be appended to any word of n bits to generate an even or an odd number
of 1’s (or 0’s). A combinational logic device that generates even or odd parity is called a
parity generator. A device that is used to detect even or odd parity is called a parity detector.
To understand the concept of parity generation and detection, consider the following 8-bit
words to which a ninth parity bit is appended as the LSB shown in brackets:
11010101[1]: Even parity generation = Odd parity detection
11010101[0]: Odd parity generation = Even parity detection ...
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Publisher Resources

ISBN: 9780126912951