Book Description
Covering the fast evolving area of advanced coding, Error Control Coding for B3G/4G Wireless Systems targets IMT-Advanced systems to present the latest findings and implementation solutions. The book begins by detailing the fundamentals of advanced coding techniques such as Coding, Decoding, Design, and Optimization. It provides not only state-of-the-art research findings in 3D Turbo-codes, non-binary LDPC Codes, Fountain, and Raptor codes, but also insights into their real-world implementation by examining hardware architecture solutions, for example VLSI complexity, FPGA, and ASIC. Furthermore, special attention is paid to Incremental redundancy techniques, which constitute a key feature of Wireless Systems.
A promising application of these advanced coding techniques, the Turbo-principle (also known as iterative processing), is illustrated through an in-depth discussion of Turbo-MIMO, Turbo-Equalization, and Turbo-Interleaving techniques. Finally, the book presents the status of major standardization activities currently implementing such techniques, with special interest in 3GPP UMTS, LTE, WiMAX, IEEE 802.11n, DVB-RCS, DVB-S2, and IEEE 802.22. As a result, the book coherently brings together academic and industry vision by providing readers with a uniquely comprehensive view of the whole topic, whilst also giving an understanding of leading-edge techniques.
Includes detailed coverage of coding, decoding, design, and optimization approaches for advanced codes
Provides up to date research findings from both highly reputed academics and industry standpoints
Presents the latest status of standardization activities for Wireless Systems related to advanced coding
Describes real-world implementation aspects by giving insights into architecture solutions for both LDPC and Turbo-codes
Examines the most advanced and promising concepts of turbo-processing applications: Turbo-MIMO, Turbo-Equalization, Turbo-Interleaving
Table of Contents
- Cover
- Wiley-WWRF Series
- Title Page
- Copyright
- Dedication
- About the Editors
- Contributors
- Preface
- Acknowledgments
- Abbreviations
- Chapter 1: Coding
- Chapter 2: Decoding
- Chapter 3: Incremental Redundancy for Coding
- Chapter 4: Architecture and Hardware Requirements
- Chapter 5: Turbo-Principle Extensions
- Chapter 6: Standardization
- Index