Book description
All the design and development inspiration and direction a harware engineer needs in one blockbuster book! Clive "Max" Maxfield renowned author, columnist, and editor of PL DesignLine has selected the very best FPGA design material from the Newnes portfolio and has compiled it into this volume. The result is a book covering the gamut of FPGA design from design fundamentals to optimized layout techniques with a strong pragmatic emphasis. In addition to specific design techniques and practices, this book also discusses various approaches to solving FPGA design problems and how to successfully apply theory to actual design tasks. The material has been selected for its timelessness as well as for its relevance to contemporary FPGA design issues.Contents
Chapter 1 Alternative FPGA Architectures
Chapter 2 Design Techniques, Rules, and Guidelines
Chapter 3 A VHDL Primer: The Essentials
Chapter 4 Modeling Memories
Chapter 5 Introduction to Synchronous State Machine Design and Analysis
Chapter 6 Embedded Processors
Chapter 7 Digital Signal Processing
Chapter 8 Basics of Embedded Audio Processing
Chapter 9 Basics of Embedded Video and Image Processing
Chapter 10 Programming Streaming FPGA Applications Using Block Diagrams In Simulink
Chapter 11 Ladder and functional block programming
Chapter 12 Timers
- Hand-picked content selected by Clive "Max" Maxfield, character, luminary, columnist, and author
- Proven best design practices for FPGA development, verification, and low-power
- Case histories and design examples get you off and running on your current project
Table of contents
- Brief Table of Contents
- Table of Contents
- Copyright
- Preface
- About the Editor
- About the Contributors
-
Chapter 1. Alternative FPGA Architectures
- 1.1. A Word of Warning
- 1.2. A Little Background Information
- 1.3. Antifuse versus SRAM versus…
- 1.4. Fine-, Medium-, and Coarse-Grained Architectures
- 1.5. MUX- versus LUT-Based Logic Blocks
- 1.6. CLBs versus LABs versus Slices
- 1.7. Fast Carry Chains
- 1.8. Embedded RAMs
- 1.9. Embedded Multipliers, Adders, MACs, Etc
- 1.10. Embedded Processor Cores (Hard and Soft)
- 1.11. Clock Trees and Clock Managers
- 1.12. General-Purpose I/O
- 1.13. Gigabit Transceivers
- 1.14. Hard IP, Soft IP, and Firm IP
- 1.15. System Gates versus Real Gates
- 1.16. FPGA Years
-
Chapter 2. Design Techniques, Rules, and Guidelines
- 2.1. Hardware Description Languages
- 2.2. Top-Down Design
- 2.3. Synchronous Design
- 2.4. Floating Nodes
- 2.5. Bus Contention
- 2.6. One-Hot State Encoding
- 2.7. Design For Test (DFT)
- 2.8. Testing Redundant Logic
- 2.9. Initializing State Machines
- 2.10. Observable Nodes
- 2.11. Scan Techniques
- 2.12. Built-In Self-Test (BIST)
- 2.13. Signature Analysis
- 2.14. Summary
- Chapter 3. A VHDL Primer
- Chapter 4. Modeling Memories
-
Chapter 5. Introduction to Synchronous State Machine Design and Analysis
- 5.1. Introduction
- 5.2. Models for Sequential Machines
- 5.3. The Fully Documented State Diagram
- 5.4. The Basic Memory Cells
- 5.5. Introduction to Flip-Flops
- 5.6. Procedure for FSM (Flip-Flop) Design and the Mapping Algorithm
- 5.7. The D Flip-Flops: General
- The RET D Flip-Flop
- The Master-Slave D Flip-Flop
- 5.8. Flip-Flop Conversion: The T, JK Flip-Flops and Miscellaneous Flip-Flops
- The JK Flip-Flops and Their Design from D Flip-Flops
- 5.9. Latches and Flip-Flops with Serious Timing Problems: A Warning
- 5.10. Asynchronous Preset and Clear Overrides
- 5.11. Setup and Hold Time Requirements of Flip-Flops
- 5.12. Design of Simple Synchronous State Machines with Edge-Triggered Flip-Flops: Map Conversion
- 5.13. Analysis of Simple State Machines
- 5.14. VHDL Description of Simple State Machines
- References
- Chapter 6. Embedded Processors
- Chapter 7. Digital Signal Processing
- Chapter 8. Basics of Embedded Audio Processing
- Chapter 9. Basics of Embedded Video and Image Processing
- Chapter 10. Programming Streaming FPGA Applications Using Block Diagrams in Simulink
- BibliographyReferences
- Chapter 11. Ladder and Functional Block Programming
- Chapter 12. Timers
- Index
Product information
- Title: FPGAs: World Class Designs
- Author(s):
- Release date: February 2009
- Publisher(s): Newnes
- ISBN: 9780080950808
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