
124 Gallium Nitride (GaN): Physics, Devices, and Technology
4.5.5 oPtiMuM t-shAPed gAte design for
M
iniMized PArAsitic cAPAcitAnce
The gate resistance (R
g
) is a key device parameter that affects f
max
and a noise per-
formance of HEMTs. A T-shaped gate structure has been used to reduce R
g
while
minimizing the gate length (L
g
). With aggressive device scaling, a parasitic capaci-
tance (C
p
) associated with T-shaped gate geometry becomes no longer negligible
and a careful design of T-gate structure is required. A C
p
was calculated using 3D
full-wave electromagnetic eld simulation. Figure 4.15 illustrates the simulated
T-gate structure that has a ...