Chapter 2Ultrafine Pitch 3D Stacked Integrated Circuits: Technology, Design Enablement, and Application
Dragomir Milojevic Prashant Agrawal Praveen Raghavan Geert Van der Plas Francky Catthoor Liesbet Van der Perre Dimitrios Velenis Ravi Varadarajan and Eric Beyne
IMEC, Kapeldreef 75, 3001 Leuven, Belgium
2.1 Introduction
Today through‐silicon via (TSV) is a mature process technology option for manufacturing of 3D stacked integrated circuits (3D‐SIC). When designing a 3D‐SIC system, the total area required for the TSVs, as compared with the total die area, and the number of inter‐die connections are among the most important parameters to be checked, and they typically depend on the physical dimensions of the TSV and the technology node used. ...
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