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Heterogeneous Computing with OpenCL, 2nd Edition by Dana Schaa, Perhaad Mistry, David R. Kaeli, Lee Howes, Benedict Gaster

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Index

Note: Page numbers followed by f indicate figures and t indicate tables.

A

Accelerated processing unit (APU)
architecture, 203
E350 “Zacate” AMD, 62, 62f
GPU and CPU cores, 62–63
integration, SoCs, 51–52
Intel’s Ivy design, 62, 63f
Address translation cache, 152
AMD APP KernelAnalyzer, 251–252
AMD APP Profiler
application trace, 247
GPU kernel performance counters, 255
performance analysis, 246
AMD Bobcat CPU core, See Central processing units
AMD Bulldozer, See Central processing units
AMD E350 “Zacate.”, See Accelerated processing unit
AMD Istanbul, See Central processing units
AMD Phenon II, See Central processing units
AMD Radeon HD6970, See Graphic processing units
AMD Radeon HD5000/6000 series
LDS limits, 272
other constraints, 273 ...

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