Book description
Inside the Machine explains how microprocessors operate - what they do, and how they do it. Written by the co-founder of the highly respected Ars Technica site, the book begins with the fundamentals of computing, defining what a computer is and using analogies, numerous 4-color diagrams, and clear explanations to communicate the concepts that form the basis of modern computing. After discussing computers in the abstract, the book goes on to cover specific microprocessors, discussing in detail how they work and how they differ.
Table of contents
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Inside the Machine
- Preface
- Acknowledgments
- Introduction
- 1. Basic Computing Concepts
- 2. The Mechanics of Program Execution
-
3. Pipelined Execution
- The Lifecycle of an Instruction
- Basic Instruction Flow
- Pipelining Explained
- Applying the Analogy
- 4. Superscalar Execution
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5. The Intel Pentium and Pentium Pro
- The Original Pentium
- The Intel P6 Microarchitecture: The Pentium Pro
- Conclusion
- 6. PowerPC Processors: 600 Series, 700 Series, and 7400
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7. Intel's Pentium 4 vs. Motorola's G4e: Approaches and Design Philosophies
- The Pentium 4's Speed Addiction
- The General Approaches and Design Philosophies of the Pentium 4 and G4e
- An Overview of the G4e's Architecture and Pipeline
- Branch Prediction on the G4e and Pentium 4
- An Overview of the Pentium 4's Architecture
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An Overview of the Pentium 4's Pipeline
- Stages 1 and 2: Trace Cache Next Instruction Pointer
- Stages 3 and 4: Trace Cache Fetch
- Stage 5: Drive
- Stages 6 Through 8: Allocate and Rename (ROB)
- Stage 9: Queue
- Stages 10 Through 12: Schedule
- Stages 13 and 14: Issue
- Stages 15 and 16: Register Files
- Stage 17: Execute
- Stage 18: Flags
- Stage 19: Branch Check
- Stage 20: Drive
- Stages 21 and Onward: Complete and Commit
- The Pentium 4's Instruction Window
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8. Intel's Pentium 4 vs. Motorola's G4e: The Back End
- Some Remarks About Operand Formats
- The Integer Execution Units
- The Floating-Point Units (FPUs)
- The Vector Execution Units
- Conclusions
- 9. 64-Bit Computing and x86-64
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10. The G5: IBM's PowerPC 970
- Overview: Design Philosophy
- Caches and Front End
- Branch Prediction
- The Trade-Off: Decode, Cracking, and Group Formation
- The PowerPC 970's Back End
- Load-Store Units
- Front-Side Bus
- The Floating-Point Units
- Vector Computing on the PowerPC 970
- Floating-Point Issue Queues
- The Performance Implications of the 970's Group Dispatch Scheme
- Conclusions
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11. Understanding Caching and Performance
- Caching Basics
- Locality of Reference
- Cache Organization: Blocks and Block Frames
- Tag RAM
- Fully Associative Mapping
- Direct Mapping
- N-Way Set Associative Mapping
- Temporal and Spatial Locality Revisited: Replacement/Eviction Policies and Block Sizes
- Write Policies: Write-Through vs. Write-Back
- Conclusions
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12. Intel's Pentium M, Core Duo, and Core 2 Duo
- Code Names and Brand Names
- The Rise of Power-Efficient Computing
- Power Density
- The Pentium M
- Core Duo/Solo
- Core 2 Duo
- Core's Back End
- A. Bibliography and Suggested Reading
- Index
- About the Author
- Colophon
- B. Updates
Product information
- Title: Inside the Machine
- Author(s):
- Release date: December 2006
- Publisher(s): No Starch Press
- ISBN: 9781593271046
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