Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

Exercises

1:	Four Itanium logical instructions directly correspond to four of the sixteen logical functions in Table 6-1. Write single Itanium instructions that compute some of the other logical functions.
2:	Suppose that registers r2 and r3 contain the values 0x12345678 and 0x9abcdef0, respectively. What would be the results computed and stored in register r1 by each of the Itanium logical instructions?
3:	Devise examples to show that andcm r1=r2,r3 does not produce r1 = r2 NAND r3.
4:	What is the net result of the following instruction sequence? xor r23=r22,r23 xor r22=r23,r22 xor r23=r22,r23
5:	When an immediate value is used in an Itanium logical instruction, state in words what can be said a priori about bits <63:8> of the result for: (a) and