10.1. Processor-Level Parallelism
Most contemporary processors, whether RISC or CISC, have come to rely upon instruction pipelining as an important means of enhancing performance. In any architecture, the various stages of the instruction cycle (such as in Figure 2-4) involve specialized internal hardware. Some electronic components perform instruction decoding, for example, while others handle the retention of results.
An analogy is often drawn to the industrial model of an assembly line in a manufacturing process, but the philosophical concept is at least as old as the discussion of specialized skills in relation to social organization in Plato's Republic.
10.1.1. Simplified Instruction Pipeline
The basic tenets of instruction pipelining involve ...
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