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Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles
book

Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

by James S. Evans - Lawrence University, Gregory L. Trimper - viika
April 2003
Intermediate to advanced content levelIntermediate to advanced
576 pages
15h 13m
English
Pearson
Content preview from Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

5.5. Stops, Instruction Groups, and Performance

Using the disas command of gdb, we noticed earlier that the GNU assembler fills out instruction bundles with nop instructions. With all optimizations turned off, compilers and assemblers do not change the sequence of instructions expressed by the programmer.

An instruction group consists of an arbitrarily long sequence of mutually independent Itanium instructions. Consider the consequences of instruction grouping for these implementations of the Itanium architecture:

  1. A hypothetical implementation with an arbitrarily large degree of internal parallelism might carry out all instructions in the group simultaneously, using different execution units.

  2. The Itanium 2 processor, in one clock cycle, can carry ...

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Publisher Resources

ISBN: 0131013726Purchase book