April 2003
Intermediate to advanced
576 pages
15h 13m
English
The Itanium architecture, like many others, uses separate opcodes for operations involving general (integer) or floating-point registers. An ISA may provide instructions that copy data between storage locations: register–memory, register–register, or memory–memory. For floating-point data, RISC and Itanium architectures do not support direct memory–memory copying; instead, they provide register–memory (load and store), as well as register–register (move), transfers.
In this chapter, we take up floating-point instructions in the same order used for integer instructions, concentrating on their intended effect. Details of the conversions of floating-point data between memory and register formats have been discussed ...