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Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles
book

Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

by James S. Evans - Lawrence University, Gregory L. Trimper - viika
April 2003
Intermediate to advanced content levelIntermediate to advanced
576 pages
15h 13m
English
Pearson
Content preview from Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

8.7. Integer Operations in Floating-Point Execution Units

Advanced CISC architectures typically support many data types, and implement special instructions to convert amongst the various data representations. Those traditional architectures usually contain one set of “general purpose” registers to manipulate both integer and floating-point data.

RISC architectures typically implement divided register sets, and early RISC implementations lacked internal datapaths directly connecting the integer registers with the floating-point registers. If no instruction types permitted an integer register to be a data source and a floating-point register to be a destination, or vice versa, then load and store instructions had to be involved in converting data ...

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Publisher Resources

ISBN: 0131013726Purchase book