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Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles
book

Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

by James S. Evans - Lawrence University, Gregory L. Trimper - viika
April 2003
Intermediate to advanced content levelIntermediate to advanced
576 pages
15h 13m
English
Pearson
Content preview from Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

10.1. Processor-Level Parallelism

Most contemporary processors, whether RISC or CISC, have come to rely upon instruction pipelining as an important means of enhancing performance. In any architecture, the various stages of the instruction cycle (such as in Figure 2-4) involve specialized internal hardware. Some electronic components perform instruction decoding, for example, while others handle the retention of results.

An analogy is often drawn to the industrial model of an assembly line in a manufacturing process, but the philosophical concept is at least as old as the discussion of specialized skills in relation to social organization in Plato's Republic.

10.1.1. Simplified Instruction Pipeline

The basic tenets of instruction pipelining involve ...

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Publisher Resources

ISBN: 0131013726Purchase book