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Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles
book

Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

by James S. Evans - Lawrence University, Gregory L. Trimper - viika
April 2003
Intermediate to advanced content levelIntermediate to advanced
576 pages
15h 13m
English
Pearson
Content preview from Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

10.3. Explicit Parallelism in the Itanium Processors

Separating Itanium instructions into independent groups and bundling three instructions with a template represent departures from the programming model for most other computer architectures. Here we expand upon the preliminary discussion given in Chapter 5.

10.3.1. Instruction Templates

The 128-bit Itanium instruction word includes three 41-bit slots for instructions and a 5-bit field for the template that guides those three instructions into particular instruction units. With a 5-bit field, up to 32 different templates are possible, but only three-fourths of those have been defined, as shown in Table 10-2.

Table 10-2. Itanium Instruction Templates
CodeSlotUnitCodeSlotUnitCodeSlotUnitCodeSlot ...
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Publisher Resources

ISBN: 0131013726Purchase book