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Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles
book

Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

by James S. Evans - Lawrence University, Gregory L. Trimper - viika
April 2003
Intermediate to advanced content levelIntermediate to advanced
576 pages
15h 13m
English
Pearson
Content preview from Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

10.6. Program Optimization Factors

If we were writing this book some decades ago, we would be drawing your attention to such factors as instruction size, instruction complexity or power, instruction timing, and addressing modes. Those factors influence overall efficiency, especially in machines with CISC architectures, where diversified instruction sets offer many ways to perform given tasks.

Such factors become somewhat subtler for machines with RISC-like architectures. We now consider whether certain software aspects matter very much today, especially for the Itanium architecture.

10.6.1. Instruction Size

CISC architectures (e.g., IA-32 or VAX) offered several alternative ways to accomplish many common tasks in a program. The instruction occupying ...

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Publisher Resources

ISBN: 0131013726Purchase book