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Low-Voltage SOI CMOS VLSI Devices and Circuits by James B. Kuo, Shih-Chia Lin

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SOI CMOS Devices–Part II

In this chapter, more topics on SOI CMOS devices are presented. Starting from the hot carriers of the SOI CMOS devices, the accumulation-mode and double-gate SOI devices are analyzed. Then, dynamic-threshold (DTMOS) devices are introduced, followed by the scaling trends of SOI CMOS devices and the SOI single electron transistors (SET). Next, the temperature dependence of the SOI devices is analyzed. Finally, sensitivities and radiation effects of SOI CMOS devices are described.

3.1 HOT CARRIERS

For an SOI NMOS device biased at a high drain voltage, the electric field near the drain is large, where impact ionization may result in the rapid increase in the drain current and even breakdown. On the other hand, as shown in Fig. 3.1, the electrons and the holes with a high energy (hot carriers) generated by impact ionization may leave the thin film to enter the front or the buried oxide to cause interface traps. As a result, the properties of the device are changed [1]. As shown in Fig. 3.1, a portion of the hot electrons generated by impact ionization are collected by the drain. Another portion of the hot electrons goes toward the front oxide. The other portion of the hot electrons goes toward the buried oxide. The hot holes generated by impact ionization tend to move and accumulate in the bottom of the thin film near the source to trigger turn-on of the parasitic ...

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