Micro- and Nanoelectronics

Book description

Micro- and Nanoelectronics: Emerging Device Challenges and Solutions presents a comprehensive overview of the current state of the art of micro- and nanoelectronics, covering the field from fundamental science and material properties to novel ways of making nanodevices. Containing contributions from experts in both industry and academia, this cutting-edge text:

  • Discusses emerging silicon devices for CMOS technologies, fully depleted device architectures, characteristics, and scaling
  • Explains the specifics of silicon compound devices (SiGe, SiC) and their unique properties
  • Explores various options for post-CMOS nanoelectronics, such as spintronic devices and nanoionic switches
  • Describes the latest developments in carbon nanotubes, iii-v devices structures, and more

Micro- and Nanoelectronics: Emerging Device Challenges and Solutions provides an excellent representation of a complex engineering field, examining emerging materials and device architecture alternatives with the potential to shape the future of nanotechnology.

Table of contents

  1. Front Cover (1/2)
  2. Front Cover (2/2)
  3. Contents
  4. Preface
  5. Editor
  6. Contributors (1/2)
  7. Contributors (2/2)
  8. Chapter 1: SiGe BiCMOS Technology and Devices (1/4)
  9. Chapter 1: SiGe BiCMOS Technology and Devices (2/4)
  10. Chapter 1: SiGe BiCMOS Technology and Devices (3/4)
  11. Chapter 1: SiGe BiCMOS Technology and Devices (4/4)
  12. Chapter 2: Si–Ge Interdiffusion, Dopant Diffusion, and Segregation in SiGe- and SiGe:C-Based Devices (1/6)
  13. Chapter 2: Si–Ge Interdiffusion, Dopant Diffusion, and Segregation in SiGe- and SiGe:C-Based Devices (2/6)
  14. Chapter 2: Si–Ge Interdiffusion, Dopant Diffusion, and Segregation in SiGe- and SiGe:C-Based Devices (3/6)
  15. Chapter 2: Si–Ge Interdiffusion, Dopant Diffusion, and Segregation in SiGe- and SiGe:C-Based Devices (4/6)
  16. Chapter 2: Si–Ge Interdiffusion, Dopant Diffusion, and Segregation in SiGe- and SiGe:C-Based Devices (5/6)
  17. Chapter 2: Si–Ge Interdiffusion, Dopant Diffusion, and Segregation in SiGe- and SiGe:C-Based Devices (6/6)
  18. Chapter 3: SiC MOS Devices : Nitrogen Passivation of Near-Interface Defects (1/4)
  19. Chapter 3: SiC MOS Devices : Nitrogen Passivation of Near-Interface Defects (2/4)
  20. Chapter 3: SiC MOS Devices : Nitrogen Passivation of Near-Interface Defects (3/4)
  21. Chapter 3: SiC MOS Devices : Nitrogen Passivation of Near-Interface Defects (4/4)
  22. Chapter 4: Fully Depleted Devices : FDSOI and FinFET (1/5)
  23. Chapter 4: Fully Depleted Devices : FDSOI and FinFET (2/5)
  24. Chapter 4: Fully Depleted Devices : FDSOI and FinFET (3/5)
  25. Chapter 4: Fully Depleted Devices : FDSOI and FinFET (4/5)
  26. Chapter 4: Fully Depleted Devices : FDSOI and FinFET (5/5)
  27. Chapter 5: Fully Depleted SOI Technology Overview (1/4)
  28. Chapter 5: Fully Depleted SOI Technology Overview (2/4)
  29. Chapter 5: Fully Depleted SOI Technology Overview (3/4)
  30. Chapter 5: Fully Depleted SOI Technology Overview (4/4)
  31. Chapter 6: FinFETs : Designing for New Logic Technology (1/5)
  32. Chapter 6: FinFETs : Designing for New Logic Technology (2/5)
  33. Chapter 6: FinFETs : Designing for New Logic Technology (3/5)
  34. Chapter 6: FinFETs : Designing for New Logic Technology (4/5)
  35. Chapter 6: FinFETs : Designing for New Logic Technology (5/5)
  36. Chapter 7: Reliability Issues in Planar and Nonplanar (FinFET) Device Architectures (1/4)
  37. Chapter 7: Reliability Issues in Planar and Nonplanar (FinFET) Device Architectures (2/4)
  38. Chapter 7: Reliability Issues in Planar and Nonplanar (FinFET) Device Architectures (3/4)
  39. Chapter 7: Reliability Issues in Planar and Nonplanar (FinFET) Device Architectures (4/4)
  40. Chapter 8: High-Mobility Channels (1/6)
  41. Chapter 8: High-Mobility Channels (2/6)
  42. Chapter 8: High-Mobility Channels (3/6)
  43. Chapter 8: High-Mobility Channels (4/6)
  44. Chapter 8: High-Mobility Channels (5/6)
  45. Chapter 8: High-Mobility Channels (6/6)
  46. Chapter 9: 2-D InAs XOI FETs : Fabrication and Device Physics (1/3)
  47. Chapter 9: 2-D InAs XOI FETs : Fabrication and Device Physics (2/3)
  48. Chapter 9: 2-D InAs XOI FETs : Fabrication and Device Physics (3/3)
  49. Chapter 10: Beyond-CMOS Devices (1/5)
  50. Chapter 10: Beyond-CMOS Devices (2/5)
  51. Chapter 10: Beyond-CMOS Devices (3/5)
  52. Chapter 10: Beyond-CMOS Devices (4/5)
  53. Chapter 10: Beyond-CMOS Devices (5/5)
  54. Chapter 11: Stateful STT-MRAM-Based Logic for Beyond–Von Neumann Computing (1/6)
  55. Chapter 11: Stateful STT-MRAM-Based Logic for Beyond–Von Neumann Computing (2/6)
  56. Chapter 11: Stateful STT-MRAM-Based Logic for Beyond–Von Neumann Computing (3/6)
  57. Chapter 11: Stateful STT-MRAM-Based Logic for Beyond–Von Neumann Computing (4/6)
  58. Chapter 11: Stateful STT-MRAM-Based Logic for Beyond–Von Neumann Computing (5/6)
  59. Chapter 11: Stateful STT-MRAM-Based Logic for Beyond–Von Neumann Computing (6/6)
  60. Chapter 12: Four-State Hybrid Spintronics–Straintronics for Ultra-Low Power Computing (1/7)
  61. Chapter 12: Four-State Hybrid Spintronics–Straintronics for Ultra-Low Power Computing (2/7)
  62. Chapter 12: Four-State Hybrid Spintronics–Straintronics for Ultra-Low Power Computing (3/7)
  63. Chapter 12: Four-State Hybrid Spintronics–Straintronics for Ultra-Low Power Computing (4/7)
  64. Chapter 12: Four-State Hybrid Spintronics–Straintronics for Ultra-Low Power Computing (5/7)
  65. Chapter 12: Four-State Hybrid Spintronics–Straintronics for Ultra-Low Power Computing (6/7)
  66. Chapter 12: Four-State Hybrid Spintronics–Straintronics for Ultra-Low Power Computing (7/7)
  67. Chapter 13: Nanoionic Switches as Post-CMOS Devices for Neuromorphic Electronics (1/4)
  68. Chapter 13: Nanoionic Switches as Post-CMOS Devices for Neuromorphic Electronics (2/4)
  69. Chapter 13: Nanoionic Switches as Post-CMOS Devices for Neuromorphic Electronics (3/4)
  70. Chapter 13: Nanoionic Switches as Post-CMOS Devices for Neuromorphic Electronics (4/4)
  71. Chapter 14: Physics-Based Compact Graphene Device Modeling (1/4)
  72. Chapter 14: Physics-Based Compact Graphene Device Modeling (2/4)
  73. Chapter 14: Physics-Based Compact Graphene Device Modeling (3/4)
  74. Chapter 14: Physics-Based Compact Graphene Device Modeling (4/4)
  75. Chapter 15: Carbon Nanotube Vertical Interconnects : Prospects and Challenges (1/5)
  76. Chapter 15: Carbon Nanotube Vertical Interconnects : Prospects and Challenges (2/5)
  77. Chapter 15: Carbon Nanotube Vertical Interconnects : Prospects and Challenges (3/5)
  78. Chapter 15: Carbon Nanotube Vertical Interconnects : Prospects and Challenges (4/5)
  79. Chapter 15: Carbon Nanotube Vertical Interconnects : Prospects and Challenges (5/5)
  80. Chapter 16: Graphene Nanosheet as Ultrathin Barrier (1/5)
  81. Chapter 16: Graphene Nanosheet as Ultrathin Barrier (2/5)
  82. Chapter 16: Graphene Nanosheet as Ultrathin Barrier (3/5)
  83. Chapter 16: Graphene Nanosheet as Ultrathin Barrier (4/5)
  84. Chapter 16: Graphene Nanosheet as Ultrathin Barrier (5/5)
  85. Back Cover

Product information

  • Title: Micro- and Nanoelectronics
  • Author(s): Tomasz Brozek
  • Release date: October 2014
  • Publisher(s): CRC Press
  • ISBN: 9781482214918