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Microcontroller Programming and Interfacing Texas Instruments MSP430 by Daniel J. Pack, Steven F. Barrett

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188 6. TIMER SYSTEMS
//M. Buccini / L. Westlund
//Texas Instruments Inc.
//September 2005
//Built with CCE Version:
//3.2.0 and IAR Embedded Workbench Version: 3.40A
//***********************************************************************
#include <msp430x20x3.h>
void main(void)
{
WDTCTL = WDT_ADLY_250; //WDT 250ms, ACLK, interval timer
IE1 |= WDTIE; //Enable WDT interrupt
P1DIR |= 0x01; //Set P1.0 to output direction
__BIS_SR(LPM3_bits + GIE); //Enter LPM3 w/interrupt
}
// Watchdog Timer interrupt service routine
#pragma vector=WDT_VECTOR
__interrupt void watchdog_timer(void)
{
P1OUT ˆ= 0x01; //Toggle P1.0 using exclusive-OR
}
//***********************************************************************
6.9 BASIC TIMER 1
All MSP430 microcontrollers in the 4xx families are equipped with Basic Timer 1.
2
The timer can
be used as the clock source for a Liquid Crystal Display module as well as a basic time interval
generator. It can also be used as a real-time clock. The registers used as the counter are BTCNT1
and BTCNT2 registers as shown in Figure 6.13. The BTCNT2 register can be used separately as
a counter as well. When it is used separately, either the SMCLK clock, the ACLK clock, or the
BTCNT1 counter can be used as the clock source for the BTCNT2 register. If BTCNT1 is used, it is
used as a pre-scalar. The basic timer is configured by the BTCTL register also shown in Figure 6.13.
The BTSSEL bit selects the clock source for the BTCNT2 counter. If this bit is cleared (0),
either the SMCLK or ACLK clock is used as the clock source for the BTCNT2 register. If this bit
is set (1), the output of the BTCNT1 register is used as the clock source for the BTCNT2 register.
The BTHOLD bit is used to stop BTCNT2 from counting when this bit is set (1). If this bit is
2
It should again be mentioned the information presented here can be applied to other families; however, documentation for the
specific family should be consulted because register names may be different.
6.9. BASIC TIMER 1 189
76 5 4 32 1 0
Basic Timer 1 Control Register (BTCTL)
BTSSEL BTHOLD BTDIV BTFRFQx BTIPx
rw rw rw rw rw rw rw rw
BTCNT1
Q4 Q5 Q6 Q7
EN1
CLK1
11
10
01
00
f
LCD
BTFRFQx
00
01
10
11
BTSSEL
BTCNT2
Q4 Q5 Q6 Q7Q0 Q1 Q2 Q3
EN2
CLK2
BTDIV
BTHOLD
SMCLK
ACLK
ACLK:256
111
110
101
100
011
010
001
000
Set_BTIFG
BTIPx
Figure 6.13: Basic Timer and Control Register. Adapted from [slau056j].
set and the BTDIV is set, the BTCNT1 register also stops counting. When the BTHOLD bit is
cleared (0), the basic timer operates normally. When the BTDIV bit is cleared (0), the basic timer
operates normally, and when it is set (1), the output of the BTCNT1 register is used as the clock
source for the BTCNT2 register.
Then BTFRFQx bits (4 and 3) select the clock speed. It divides the clock source (ACLK) by
32, 64, 128, or 256, which correspond to 00, 01, 10, and 11 for the two bits. The BTIPx bits (bits
2,1, and 0) are used to set the interrupt intervals. When an interrupt occurs, the BTIFG flag in the
IFG2 register is set. The interval rate is governed as follows:
000 - divide the clock frequency by 2
001 - divide the clock frequency by 4
010 - divide the clock frequency by 8
011 - divide the clock frequency by 16
100 - divide the clock frequency by 32
190 6. TIMER SYSTEMS
101 - divide the clock frequency by 64
110 - divide the clock frequency by 128
111 - divide the clock frequency by 256
To enable the interrupt, the BTIE bit in the IE2 register must be set. The following example
program segment shows how one can program the MSP430P410 to toggle the logic state at P1.0
every time the basic timer overflows. Assume all initialization has been appropriately made.
Example: In this example, we use the MSP-EXP430FG4618 Experimenters Board introduced in
Chapter A.5. This board hosts the MSP430FG4618 microcontroller. This example was adapted
from sample code provided by Texas Instruments [slac118d]. In this specific example, the Basic
Timer is used to toggle an LED on P5.1. Both Assembly and C Language examples are provided.
;************************************************************************
;MSP430xG461x Demo - Basic Timer, Toggle P5.1 inside an interrupt
;service routine (ISR). The A CLK is operating at 32kHz.
;
;Description: Toggles P5.1 by xor’ing P5.1 inside of a basic timer ISR.
;The ACLK provides the basic timer clock source. The LED toggles every
;125ms.
;
;An external watch crystal between XIN and XOUT is required for the
;ACLK. (ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK
; = 1048576Hz
;
;JL Bile
;Texas Instruments Inc.
;June 2008
;Built Code Composer Essentials: v3 FET
;************************************************************************
.cdecls C,LIST, "msp430xG46x.h"
;------------------------------------------------------------------------
.text ;Program Start
;------------------------------------------------------------------------
RESET mov.w #900,SP ;Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ;Stop WDT
SetupFLL bis.b #XCAP14PF,&FLL_CTL0 ;Configure load caps
bis.b #BIT1,&P5DIR ;Set P5.1 as Output
SetupBT mov.b #BTDIV+BT_fCLK2_DIV16, & BTCTL ; ACLK/(256*16)

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