7.5. INTERRUPTS 223
• the program counter register is loaded with the boot code start address (ex. 0xFFFE),
• the status register (SR) is cleared,
• all peripheral modules and registers are initialized, and the
• Watchdog Timer is initialized (Watchdog Mode).
Due to the steps taken by the MSP430 microcontroller after a reset, the programmer must
make sure that, at the start of the proper program module, the stack pointer, the watchdog speciﬁ-
cations, and peripheral modules are initialized.
A microcontroller normally executes instructions in an orderly fetch-decode-execute sequence as
dictated by a user-written program as shown in Figure 7.3. However, the microcontroller must
be equipped to handle unscheduled, higher priority events that might occur inside or outside the
microcontroller. To process such events, a microcontroller requires an interrupt system.
The interrupt system onboard a microcontroller allows it to respond to higher priority events.
These events may be planned, but we do not know when they will occur. When an interrupt event
occurs, the microcontroller will normally complete the instruction it is currently executing and then
transition program control to interrupt event speciﬁc tasks. These tasks, which resolve the interrupt
event, are organized into a function called an interrupt service routine (ISR). Each interrupt will
normally have its own interrupt speciﬁc ISR. Once the ISR is complete, the microcontroller will
resume processing where it left off before the interrupt event occurred.
Applying the general concept of an interrupt, one can consider resets as interrupts with one
exception. Resets do not return to the original task and instead resets the controller while after an
interrupt service routine a controller resumes execution of the task just before the interrupt was
detected. Thus, with the understanding of the difference between resets and interrupts, resets may
be categorized as non-maskable interrupts (NMI).
Besides resets, there are two other types of NMIs supported by MSP430 microcontroller. The
ﬁrst type is the system generated NMIs (SNMI), and the second type are the ones generated by
the user (UNMI). One example of an SNMI type interrupt, is the JTAG mailbox event. Recall that
the JTAG interface is available for all MSP430 microcontrollers for the purpose of programming,
debugging and testing the MSP430.The JTAG interface allows access to the CPU during program
execution. One can conﬁgure the interface such that when data is read through the interface, a non-
maskable interrupt occurs.The second and third types of SNMIs come from the Power Management
Module when either supply voltage level is not reached or the time expired before the voltage levels
settle down to designated values. These two power related SNMIs were discussed in Chapter A.5.
The last type of SNMI is caused by accessing a vacant memory location.
For the user speciﬁed NMIs, there are three sources that can generate an UNMI.The ﬁrst one
is associated with access violation of ﬂash memory. The second one is caused by an oscillator fault.