252 8. ANALOG PERIPHERALS
on or turn off low pass ﬁlter to the output of the comparator. The ﬁlter removes comparator output
oscillation, providing an output not affected by system noise sources.
The output of the comparator is stored in the CBOUT bit (bit 0) in the CBCTL1 register.
When the interrupt enabling CBIE bit in the Comparator_B Interrupt Control Register (CBINT)
is set, either output 1 or output 0 causes an interrupt. The CBIES (bit 3) bit of the CBCTL1 register
is used to pick which output causes an interrupt to occur: 0 for a rising edge and 1 for a falling edge.
The associated ﬂag is the CBIFG bit (bit 0) in register CBINT. As before, we should have the
general interrupt enable bit (GIE) set for the interrupt system to be turned on.
When the CBEX bit (bit 5) of the CBCTL1 register is set, two inputs are exchanged and
the output is inverted. The polarity bit, CBOUTPOL, in the CBCTL1 register is used to invert
(CBOUTPOL = 1) output polarity, if necessary.The CBSHORT bit (bit 4) of the CBCTL1 register
is used to short (set this bit) the two input pins selected by CBIPSEL and CBIMSEL bits. Why
would anyone wants to do this? Suppose CBIPSEL bits selected pin CB0 and CBIMSEL bits
selected pin CB1. If we connect a simple capacitor to pin CB1 and allow an input analog signal to
be connected to pin CB0, the CBSHORT bit can be used to transport the analog input from pin
CB0 to pin CB1, and the capacitor will capture the voltage of the analog signal appearing on the
Please refer to the documentation for the speciﬁc MSP 430 microcontroller being used for a
detailed description of the comparator registers.
8.5.2 MSP430 12-BIT ANALOG-TO-DIGITAL CONVERTER
The ADC converter receives up to 16 input signals on pins A0 through A15 and a built-in multiplexer
selects an analog input to be sampled, quantized, and encoded as speciﬁed by control registers. An
ADC conversion is initiated by writing to one of the control registers, results are written to result
registers (ADC12MEMx), and the corresponding ﬂags are set in the status register (ADC12IFG).
If an input voltage value is equal to reference low (REF-) value, 000h results while an input
voltage equal to reference high (REF+) voltage is represented as 0FFFh. The results are encoded
either as unsigned or 2’complement binary values. The ATD converter of MSP430 uses 12 bits to
sample analog signals, providing 4096 different quantized levels (0000h - 0FFFh) to represent a
sample value, has 16 input channels that can be connected to external (12) and internal (4) signals,
and processes more than 200 thousand samples per second. It has 18 associated interrupts and a
ﬂexible means to provide reference voltages. In this subsection, we study how this converter works.
The converter can convert one sample from a single source or multiple sources or multiple samples
from a single source or multiple sources.
Figure 8.7 shows a block diagram of the converter. It is conﬁgured using ADC12CTL0 and
ADC12CTL1 registers as we will show.
It’s a bit overwhelming, at ﬁrst glance, to see all the components of the converter, but once
you know how each component works and how it is integrated to the overall system and practice
using it a few times, you will feel at ease with the converter.