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Microcontroller Programming and Interfacing Texas Instruments MSP430 by Daniel J. Pack, Steven F. Barrett

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278 9. COMMUNICATION SYSTEMS
USCI_Ax Modulation Control Register (UCAxMCTL)
USCI_Ax Status Register (UCAxSTAT)
USCI_Ax Receive Buffer Register (UCAxRXBUF)
USCI_Ax Transmit Buffer Register (UCAxTXBUF)
USCI_Ax Interrupt Enable Register (UCAxIE)
USCI_Ax Interrupt Flag Register (UCAxIFG)
USCI_Ax Interrupt Vector Register (UCAxIV)
Refer to the specific MSP430 microcontroller document for a detailed description of each
register and bit setting.
9.3.7 UART CODE EXAMPLES
In this example, two MSP430F5438 experimenter boards are connected together to provide full-
duplex (two way) communication. A 32kHz ACLK is used as the time base for the Baudrate
Generator which is providing a Baud rate of 9600 Baud. The levels currently set on pins P1.4 and
P1.5 of one board are transmitted to the other board and displayed on light emitting diodes (LEDs),
connected to the respective, P1.1 and P1.0, pins of the experimenter board.
;************************************************************************
;MSP430F54x Demo - USCI_A0, UART 9600 Full-Duplex Transceiver, 32K ACLK
;
;Description: USCI_A0 communicates continuously as fast as possible
;full-duplex with another device. Normal mode is LPM3, with activity only
;during RX and TX ISR’s. The TX ISR indicates the UART is ready to send
;another character. The RX ISR indicates the UART has received a
;character. At 9600 baud, a full character is transceived ˜1ms.
;
;The levels on P1.4/5 are transmitted while the received value is
;displayed on P1.0/1.
;
;ACLK = BRCLK = LFXT1 = 32768, MCLK = SMCLK = DCO˜ 1048k
;Baud rate divider with 32768hz XTAL @9600 = 32768Hz/9600 =
;3.41 (0003h 4Ah)
;
;Experimental configuration:
;
; MSP430F5438 MSP430F5438
9.3. MSP430 UART 279
; ----------------- -----------------
; /|\ | XIN|- /|\ | XIN|-
; | | | 32KHz | | | 32KHz
; --|RST XOUT|- --|RST XOUT|-
;| || |
;| || |
;| || |
; ->|P1.4 | | P1.0|-> LED
; ->|P1.5 | | P1.1|-> LED
; LED <-|P1.0 | | P1.4|<-
; LED <-|P1.1 | | P1.5|<-
; | UCA0TXD/P3.4|--------->|P3.5/UCA0RXD |
; | | 9600 | |
; | UCA0RXD/P3.5|<---------|P3.4/UCA0TXD |
;
;
;M. Morales
;Texas Instruments Inc.
;September 2008
;Built with Code Composer Essentials v3.x
;************************************************************************
.cdecls C,LIST,"msp430x54x.h"
count .equ R4
delay .equ R12
tx_char .equ R13
;------------------------------------------------------------------------
.global _main
.text ;Assemble to Flash memory
;------------------------------------------------------------------------
_main
RESET mov.w #0x5C00,SP ;Initialize stackpointer
mov.w #WDTPW + WDTHOLD,&WDTCTL;Stop WDT
bis.b #0x03,&P7SEL ;Port select XT1
; Loop until XT1,XT2 & DCO stabilizes
do_while bic.w #XT2OFFG + XT1LFOFFG + DCOFFG,&UCSCTL7
280 9. COMMUNICATION SYSTEMS
;Clear XT2,XT1,DCO fault flags
bic.w #OFIFG,&SFRIFG1 ;Clear fault flags
mov.w #0xFFFF,count ;Load delay counter
osc_delay dec.w count ;Decrement counter
jne osc_delay
bit.w #OFIFG,&SFRIFG1 ;Test oscillator fault flag
jc do_while
clr.b P1OUT ;P1.0/1 setup for LED output
bis.b #BIT0 + BIT1,&P1DIR
bis.b #BIT4 + BIT5,&P3SEL ;P3.4,5 UART option select
bis.b #UCSWRST,&UCA0CTL1 ;Reset USCI state machine
bis.b #UCSSEL_1,&UCA0CTL1 ;CLK = ACLK
mov.b #0x03,&UCA0BR0 ;32k/9600 - 3.41
mov.b #0x00,&UCA0BR1
mov.b #0x06,&UCA0MCTL ;Modulation
bic.b #UCSWRST,&UCA0CTL1 ;Init USCI state machine
bis.b #UCRXIE + UCRXIE,&UCA0IE ;Enable USCI_A0 TX/RX int
bis.w #LPM3 + GIE,SR ;Enter LPM3, enable int
nop ;For debugger
;------------------------------------------------------------------------
USCI_A0_ISR
;------------------------------------------------------------------------
clr.b tx_char
clr.b delay
check_TXIFG bit.b #UCTXIFG,&UCA0IFG ;TXBUF is empty?
jnc check_RXIFG ;no -> Check for RXIFG
mov.b #240,delay ;yes -> Load delay counter
tx_delay dec.w delay
;Add small gap between TX’ed bytes
jne tx_delay
mov.b &P1IN,tx_char
rra.b tx_char
rra.b tx_char
rra.b tx_char
rra.b tx_char
mov.b tx_char,&UCA0TXBUF ;Transmit character
9.3. MSP430 UART 281
jmp exit_isr
check_RXIFG bit.b #UCRXIFG,&UCA0IFG ;Received a character?
jnc exit_isr ;no -> Jump to exit_isr
mov.b &UCA0RXBUF,&P1OUT ;yes->Move RXBUF1 to P1OUT
;for TX
exit_isr reti ;Return from interrupt
;------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------
.sect ".int57"
.short USCI_A0_ISR
.sect ".reset" ;POR, ext.
Reset
.short RESET
.end
;------------------------------------------------------------------------
In C:
//***********************************************************************
//MSP430F54x Demo - USCI_A0, UART 9600 Full-Duplex Transceiver, 32K ACLK
//
//Description: USCI_A0 communicates continuously as fast as possible
//full-duplex with another device. Normal mode is LPM3, with activity
//only during RX and TX ISR’s. The TX ISR indicates the UART is ready to
//send another character. The RX ISR indicates the UART has received a
//character.
//
//At 9600 baud, a full character is tranceived ˜1ms.
//The levels on P1.4/5 are TX’ed. RX’ed value is displayed on P1.0/1.
//ACLK = BRCLK = LFXT1 = 32768, MCLK = SMCLK = DCO˜ 1048k
//Baud rate divider with 32768hz XTAL @9600 = 32768Hz/9600 =
//3.41 (0003h 4Ah)
//
//W. Goh
//Texas Instruments Inc.
//November 2008
//Built with CCE Version: 3.2.2 and IAR Embedded Workbench Version: 4.11B
//***********************************************************************
282 9. COMMUNICATION SYSTEMS
#include "msp430x54x.h"
void main(void)
{
WDTCTL = WDTPW+WDTHOLD; //Stop watchdog timer
P7SEL |= 0x03; //Port select XT1
do
{
UCSCTL7 &= ˜(XT2OFFG + XT1LFOFFG + DCOFFG);
//Clear XT2,XT1,DCO fault
//flags
SFRIFG1 &= ˜OFIFG; //Clear fault flags
__delay_cycles(100000); //Delay for Osc to stabilize
}while (SFRIFG1&OFIFG); //Test oscillator fault flag
P1OUT = 0x000; //P1.0/1 setup for LED out
P1DIR |= BIT0+BIT1; //
P3SEL |= BIT4+BIT5; //P3.4,5 UART option select
UCA0CTL1 |= UCSWRST; //Put state machine in reset
UCA0CTL1 |= UCSSEL_1; //CLK = ACLK
UCA0BR0 = 0x03; //32k/9600 - 3.41
UCA0BR1 = 0x00; //
UCA0MCTL = 0x06; //Modulation
UCA0CTL1 &= ˜UCSWRST; //Init USCI state machine
UCA0IE |= UCTXIE + UCRXIE; //Enable USCI_A0 TX/RX int
__bis_SR_register(LPM3_bits + GIE); //Enter LPM3 w/ int enabled
__no_operation(); //For debugger
}
#pragma vector=USCI_A0_VECTOR
__interrupt void USCI_A0_ISR(void)
{
unsigned char tx_char;
switch(__even_in_range(UCA0IV,4))

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