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Microcontroller Programming and Interfacing Texas Instruments MSP430 by Daniel J. Pack, Steven F. Barrett

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9.4. SERIAL PERIPHERAL INTERFACE—SPI 283
{
case 0: break; //Vector0-nointerrupt
case 2: //Vector 2 - RXIFG
P1OUT = UCA0RXBUF; //RXBUF1 to TXBUF1
break;
case 4: //Vector 4 - TXIFG
__delay_cycles(5000); //Add small gap between
//TX’ed bytes
tx_char = P1IN;
tx_char = tx_char >> 4;
UCA0TXBUF = tx_char; //Transmit character
break;
default: break;
}
}
//***********************************************************************
9.4 SERIAL PERIPHERAL INTERFACE—SPI
The Serial Peripheral Interface or SPI also provides for two-way serial communication between a
transmitter and a receiver. In the SPI system, the transmitter and receiver pair shares a common
clock source (UCxCLK). This requires an additional clock line between the transmitter and the
receiver but allows for higher data transmission rates as compared to the UART. The SPI system
allows for fast and efficient data exchange between microcontrollers or peripheral devices. There are
many SPI compatible external systems available to extend the features of the microcontroller. For
example, a liquid crystal display or a multi-channel digital-to-analog converter could be added to
the microcontroller using the SPI system.
9.4.1 SPI OPERAT ION
The SPI may be viewed as a synchronous 16-bit shift register with an 8-bit, half residing in the
transmitter and the other 8-bit half residing in the receiver as shown in Figure 9.5.The transmitter is
designated as the master since it is providing the synchronizing clock source between the transmitter
and the receiver. The receiver is designated as the slave. A slave is chosen for reception by taking its
Slave Select (
SS) line low. When the
SS line is taken low, the slave’s shifting capability is enabled.
SPI transmission is initiated by loading a data byte into the master-configuredTransmit Buffer
(UCxTXBUF). At that time, the UCSI SPI mode Bit Clock Generator provides clock pulses to the
master and also to the slave via the UCxCLK pin. A single bit is shifted out of the master designated
shift register on the Slave In Master Out (UCxSIMO) microcontroller pin on every SCK pulse. The
data is received at the UCxSIMO pin of the slave designated device. In some peripheral devices, this
is referred to as Master Out Slave In (MOSI). At the same time, a single bit is shifted out of the

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