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33.5 Principle of operation ^ QUEUE1
Shift register
Line 0
1. The shift register consists of nine memory coils M0–M8, which are sequentially
turned ON for 0.01 sec and then OFF for 0.08 sec. The instruction, which is used
for this purpose is the incremental drum INCD.
2. Initially the data registers D0–D8 are all filled with the va lue of 1, using the instruc-
tion -[FMOV K1 D0 K9]-.
3. Each time the value in cou nter C0 reaches the value stored in each data register
D0–D8, i.e. a 1, then the corresponding memory coil M0–M8, will