July 2004
Intermediate to advanced
352 pages
9h 30m
English
Content preview from Mitsubishi FX Programmable Logic Controllers, 2nd Edition
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//INTEGRAS/ELS/PAGINATION/ELSEVIER UK/PLC/3B2/FINALS-7-6-04/0750656794-CH034.3D – 364 – [344–369/26]
19.6.2004 9:23PM
34.24 Principle of operation ^ ADC1
1. Line 0
(a) Buffer memory locat ion, i.e. BFM 30, contains the identification code for the
FX2N-4AD, which is 2010. This number is transferred to data register D2.
(b) The contents of BFM 29, i.e. error status, is transferred to individual bits from
M0 to M12 (refer page 359).
b0 transferred to M10 ON Bits b1 to b3 ON.
b1 transferred to M11 ON Offset/gain error.
b2 transferred to M12 ON Power supply abnormality.
b3 transferred to M13 ON Hardware failure.
b10 transferred to M20 ON Digital range error.
b11 transferred to M21 ON Averaging error.
b12 transferred to M22 ON Offset/gain adjust inhibit.
2. Line ...
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