Hybrid Design of a Memory Cell Using a Memristor and Ambipolar Transistors |
CONTENTS
24.1 Introduction
24.2 Memristor
24.3 Ambipolar Transistor
24.4 Proposed Memory Cell
24.4.1 WRITE Operation
24.4.1.1 WRITE a “1”
24.4.1.2 WRITE a “0”
24.4.2 READ Operation
24.5 Simulation Results
24.5.1 WRITE Operation
24.5.2 READ Operation
24.5.3 Refresh
24.5.4 Transistor Sizing
24.5.5 Comparison
24.5.6 Power
24.6 Comparative Discussion
24.7 Conclusion
References
24.1 INTRODUCTION
With the scaling of complementary metal oxide semiconductor (CMOS) in the nano ranges, the technology roadmap predicted by Moore’s law is becoming difficult to meet. The so-called emerging technologies have been widely reported to supersede ...
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