Chapter 8

NFV Infrastructure—Hardware Evolution and Testing

Abstract

In this chapter, we will look in detail at the architectural evolution in the Intel Architecture for NFV, including the increased dependence on cache efficiency for performance of NFV on CPU cores. We also look at the strategy of hardware augmentation that is opening the market for complimentary hardware acceleration through PCIE expansion. As with the software evolution in the preceding chapter, this leads to questions about our current architecture.

Keywords

Hardware evolution; Intel Architecture; NFV; CPU core; PCIE

Introduction

Enhancements and evolution in NFV performance are not limited solely to software. In the previous chapter, we focused on how certain software components, ...

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