11.1 Introduction
On-chip networks can enhance the communication bandwidth among the individual functional blocks of an integrated system, but at the same time, speed and power consumed by the networks are eventually limited by the delay of the wires connecting the network links. In the upcoming technologies, it is hardly sufficient to support the ever-increasing performance demand, without raising the energy consumption. Since long wire is the major bottleneck in designing a network-on-chip (NoC)-based system in deep submicron (DSM) technology, in terms of performance, speed, and energy consumption, researchers are trying to find out the alternatives to it. Current-mode signaling (Bashirullah ...
