[bib08_0001]  Y. Zhang, W. Ye and M. J. Irwin, “An alternative architecture for on-chip global interconnect: Segmented bus power modeling,” in Proceedings of Thirty-Second Asilomar Conference on Signals, Systems & Computers, 1998, pp. 1062–1065.
[bib08_0002]  Y. Zhang, R. Y. Chen, W. YE and M. J. Irwin, “System Level Interconnect Modeling,” Proceedings of the International ASIC Conference, September 1998, pp. 289–293.
[bib08_0003]  ARM AMBA Specification and Multi layer AHB Specification (rev2.0), http://www.arm.com, 2001.
[bib08_0004]  IBM CoreConnect Specification, http://www.ibm.com/chips/techlib/techlib.nsf/productfamilies/CoreConnect_Bus_Architecture.
[bib08_0005]  “STBus Communication System: Concepts and Definitions,” Reference ...