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[bib08_0001] [1] Y. Zhang, W. Ye and M. J. Irwin, “An alternative architecture for on-chip global interconnect: Segmented bus power modeling,” in Proceedings of Thirty-Second Asilomar Conference on Signals, Systems & Computers, 1998, pp. 1062–1065.

[bib08_0002] [2] Y. Zhang, R. Y. Chen, W. YE and M. J. Irwin, “System Level Interconnect Modeling,” Proceedings of the International ASIC Conference, September 1998, pp. 289–293.

[bib08_0003] [3] ARM AMBA Specification and Multi layer AHB Specification (rev2.0), http://www.arm.com, 2001.

[bib08_0005] [5] “STBus Communication System: Concepts and Definitions,” Reference ...

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