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Low Power Design Techniques, Design Methodology, and Tools
W
ait : In this mode, the processor core clock is gated. Operation resumes on
interrupt. This mode is useful for running low MIPS applications that primarily
involve peripheral activity, such as a viewfi nder.
Doze : In this mode, both the processor core and MAX clocks are gated. Clocks
for specifi c peripherals can be switched off automatically in Doze mode by pre-
programming the Clock Controller module. This mode is useful for processes that
require quick reactivation. Normal operation resumes on interrupt.
State retention : In this mode, all clocks are ...