Some PSE-Controller Design Suggestions for AT Compliance
As we can see from all the templates in Figs. 6.3 to 6.7, the logical place to set the nominal value of the current limit (ILIM) of the PSE’s pass-FET is roughly centered in the area marked “Maybe,” past the 8.3-ms marker. Specifically, this is the area between the upperbound and lowerbound templates. To guarantee the required performance, the min of the current limit spread must be assuredly above the lowerbound template (0.684 A for Type 2 and 0.4 A for Type 1) and its max must be below the upperbound template (1.75 A, but preferably 0.45 A for AF compliance as explained previously). Then we can be sure that the current limit will never get activated in the “Yes” region, and also will ...
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