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Real World FPGA Design with Verilog by Ken Coffman - President, Bytech Services

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Chapter 5 Verilog Test Fixtures

SRAM-based FPGA designers don’t simulate their designs enough. It is easy to burn a part and try it, so that is our tendency. We can argue some advantage to this method; after all, the end result is a part that works, right? Still, any tool that improves the quality of our design must be used. ASIC designers and designers using antifuse technology don’t have the luxury (or crutch, depending on your point of view) of trying a part that is not virtually guaranteed to work. Instead of downloading a configuration file, these designers either program an expensive antifuse device (which is thrown away if it doesn’t work) or go through a full ASIC fabrication turn (which can cost tens and hundreds of thousands of dollars). ...

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