Reconfigurable and Adaptive Computing

Reconfigurable and Adaptive Computing

by Nadia Nedjah, Chao Wang
Released October 2018
Publisher(s): Chapman and Hall/CRC
ISBN: 9781498731768

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Book description

This book explores the latest research activities on hardware architecture for reconfigurable and adaptive computing systems. It describes new, practical solutions to issues with computer and network security systems, next-generation sequencing, and more, and discusses improved approaches to video watermarking, routing, and system performance.

Table of contents

  1. Front Cover (1/2)
  2. Front Cover (2/2)
  3. Contents
  4. List of Figures (1/2)
  5. List of Figures (2/2)
  6. List of Tables
  7. Preface
  8. Editors
  9. Contributors (1/2)
  10. Contributors (2/2)
  11. Chapter 1: Effective and Efficient Design Space Exploration for Heterogeneous Microprocessor Systems-on-Chip (1/5)
  12. Chapter 1: Effective and Efficient Design Space Exploration for Heterogeneous Microprocessor Systems-on-Chip (2/5)
  13. Chapter 1: Effective and Efficient Design Space Exploration for Heterogeneous Microprocessor Systems-on-Chip (3/5)
  14. Chapter 1: Effective and Efficient Design Space Exploration for Heterogeneous Microprocessor Systems-on-Chip (4/5)
  15. Chapter 1: Effective and Efficient Design Space Exploration for Heterogeneous Microprocessor Systems-on-Chip (5/5)
  16. Chapter 2: Integer DCT-Based Real-Time Video Watermarking for H.264 Encoder (1/4)
  17. Chapter 2: Integer DCT-Based Real-Time Video Watermarking for H.264 Encoder (2/4)
  18. Chapter 2: Integer DCT-Based Real-Time Video Watermarking for H.264 Encoder (3/4)
  19. Chapter 2: Integer DCT-Based Real-Time Video Watermarking for H.264 Encoder (4/4)
  20. Chapter 3: FPGA-Accelerated Algorithm for the Regular Expressions Matching System (1/6)
  21. Chapter 3: FPGA-Accelerated Algorithm for the Regular Expressions Matching System (2/6)
  22. Chapter 3: FPGA-Accelerated Algorithm for the Regular Expressions Matching System (3/6)
  23. Chapter 3: FPGA-Accelerated Algorithm for the Regular Expressions Matching System (4/6)
  24. Chapter 3: FPGA-Accelerated Algorithm for the Regular Expressions Matching System (5/6)
  25. Chapter 3: FPGA-Accelerated Algorithm for the Regular Expressions Matching System (6/6)
  26. Chapter 4: Case Study of Genome Sequencing on an FPGA : Survey and a New Perspective (1/5)
  27. Chapter 4: Case Study of Genome Sequencing on an FPGA : Survey and a New Perspective (2/5)
  28. Chapter 4: Case Study of Genome Sequencing on an FPGA : Survey and a New Perspective (3/5)
  29. Chapter 4: Case Study of Genome Sequencing on an FPGA : Survey and a New Perspective (4/5)
  30. Chapter 4: Case Study of Genome Sequencing on an FPGA : Survey and a New Perspective (5/5)
  31. Chapter 5: Interprocess Communication via Crossbar for Shared Memory Multiprocessor Systems-on-Chip (1/5)
  32. Chapter 5: Interprocess Communication via Crossbar for Shared Memory Multiprocessor Systems-on-Chip (2/5)
  33. Chapter 5: Interprocess Communication via Crossbar for Shared Memory Multiprocessor Systems-on-Chip (3/5)
  34. Chapter 5: Interprocess Communication via Crossbar for Shared Memory Multiprocessor Systems-on-Chip (4/5)
  35. Chapter 5: Interprocess Communication via Crossbar for Shared Memory Multiprocessor Systems-on-Chip (5/5)
  36. Chapter 6: Extended Quality of Service Modeling Based on Multiapplication Environment in Network-on-Chip (1/5)
  37. Chapter 6: Extended Quality of Service Modeling Based on Multiapplication Environment in Network-on-Chip (2/5)
  38. Chapter 6: Extended Quality of Service Modeling Based on Multiapplication Environment in Network-on-Chip (3/5)
  39. Chapter 6: Extended Quality of Service Modeling Based on Multiapplication Environment in Network-on-Chip (4/5)
  40. Chapter 6: Extended Quality of Service Modeling Based on Multiapplication Environment in Network-on-Chip (5/5)
  41. Chapter 7: Ant Colony Routing for Latency Reduction in 3D Networks-on-Chip (1/5)
  42. Chapter 7: Ant Colony Routing for Latency Reduction in 3D Networks-on-Chip (2/5)
  43. Chapter 7: Ant Colony Routing for Latency Reduction in 3D Networks-on-Chip (3/5)
  44. Chapter 7: Ant Colony Routing for Latency Reduction in 3D Networks-on-Chip (4/5)
  45. Chapter 7: Ant Colony Routing for Latency Reduction in 3D Networks-on-Chip (5/5)
  46. Chapter 8: Codem : Software/Hardware Codesign for Embedded Multicore Systems Supporting Hardware Services (1/5)
  47. Chapter 8: Codem : Software/Hardware Codesign for Embedded Multicore Systems Supporting Hardware Services (2/5)
  48. Chapter 8: Codem : Software/Hardware Codesign for Embedded Multicore Systems Supporting Hardware Services (3/5)
  49. Chapter 8: Codem : Software/Hardware Codesign for Embedded Multicore Systems Supporting Hardware Services (4/5)
  50. Chapter 8: Codem : Software/Hardware Codesign for Embedded Multicore Systems Supporting Hardware Services (5/5)
  51. Chapter 9: Greedy Partitioning and Insert Scheduling Algorithm for Hardware–Software Codesign on MPSoCs (1/5)
  52. Chapter 9: Greedy Partitioning and Insert Scheduling Algorithm for Hardware–Software Codesign on MPSoCs (2/5)
  53. Chapter 9: Greedy Partitioning and Insert Scheduling Algorithm for Hardware–Software Codesign on MPSoCs (3/5)
  54. Chapter 9: Greedy Partitioning and Insert Scheduling Algorithm for Hardware–Software Codesign on MPSoCs (4/5)
  55. Chapter 9: Greedy Partitioning and Insert Scheduling Algorithm for Hardware–Software Codesign on MPSoCs (5/5)
  56. Back Cover

Product information

  • Title: Reconfigurable and Adaptive Computing
  • Author(s): Nadia Nedjah, Chao Wang
  • Release date: October 2018
  • Publisher(s): Chapman and Hall/CRC
  • ISBN: 9781498731768