[ch13bib013_001] [1] J. H. Anderson, S. D. Brown. Technology mapping for large complex PLDs. ACM/IEEE Design Automation Conference, 1998.
[ch13bib013_002] [2] J. H. Anderson, F. N. Najm. Power-aware technology mapping for LUT-based FPGAs. IEEE International Conference on Field-Programmable Technology, 2002.
[ch13bib013_003] [3] N. Bhat, D. D. Hill. Routable technology mapping for LUT FPGAs. IEEE International Conference on Computer Design, 1992.
[ch13bib013_004] [4] S. C. Chang, M. Marek-Sodowska, T. Hwang. Technology mapping for LUT FPGA based on decomposition of binary decision diagrams. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 15(10), October 1996.
[ch13bib013_005] [5] S. Chatterjee, A. Mishchenko, R. Brayton. ...
Get Reconfigurable Computing now with the O’Reilly learning platform.
O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.
