[ch21bib021_001] [1] P. Bellows, B. L. Hutchings. JHDL—An HDL for reconfigurable systems. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, April 1998.

[ch21bib021_002] [2] B. Catanzaro, B. Nelson. Higher radix floating-point representations for FPGA-based arithmetic. Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines, April 2005.

[ch21bib021_003] [3] W. Culbertson, R. Amerson, R. Carter, P. Kuekes, G. Snider. Exploring architectures for volume visualization on the Teramac custom computer. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, April 1996.

[ch21bib021_004] [4] A. Dandalis, V. K. Prasanna. Fast parallel implementation of DFT using configurable devices. Field-programmable logic: ...

Get Reconfigurable Computing now with O’Reilly online learning.

O’Reilly members experience live online training, plus books, videos, and digital content from 200+ publishers.