Sigma-Delta Converters: Practical Design Guide, 2nd Edition

Book description

Thoroughly revised and expanded to help readers systematically increase their knowledge and insight about Sigma-Delta Modulators

Sigma-Delta Modulators (SDMs) have become one of the best choices for the implementation of analog/digital interfaces of electronic systems integrated in CMOS technologies. Compared to other kinds of Analog-to-Digital Converters (ADCs), Σ∆Ms cover one of the widest conversion regions of the resolution-versus-bandwidth plane, being the most efficient solution to digitize signals in an increasingly number of applications, which span from high-resolution low-bandwidth digital audio, sensor interfaces, and instrumentation, to ultra-low power biomedical systems and medium-resolution broadband wireless communications.

Following the spirit of its first edition, Sigma-Delta Converters: Practical Design Guide, 2nd Edition takes a comprehensive look at SDMs, their diverse types of architectures, circuit techniques, analysis synthesis methods, and CAD tools, as well as their practical design considerations. It compiles and updates the current research reported on the topic, and explains the multiple trade-offs involved in the whole design flow of Sigma-Delta Modulators—from specifications to chip implementation and characterization. The book follows a top-down approach in order to provide readers with the necessary understanding about recent advances, trends, and challenges in state-of-the-art Σ∆Ms. It makes more emphasis on two key points, which were not treated so deeply in the first edition:

  • It includes a more detailed explanation of Σ∆Ms implemented using Continuous-Time (CT) circuits, going from system-level synthesis to practical circuit limitations.
  • It provides more practical case studies and applications, as well as a deeper description of the synthesis methodologies and CAD tools employed in the design of Σ∆ converters.

Sigma-Delta Converters: Practical Design Guide, 2nd Edition serves as an excellent textbook for undergraduate and graduate students in electrical engineering as well as design engineers working on SD data-converters, who are looking for a uniform and self-contained reference in this hot topic. With this goal in mind, and based on the feedback received from readers, the contents have been revised and structured to make this new edition a unique monograph written in a didactical, pedagogical, and intuitive style. 

Table of contents

  1. Cover
  2. Dedication
  3. Preface
    1. References
  4. Acknowledgements
  5. List of Abbreviations
  6. Chapter 1: Introduction to Modulators: Fundamentals, Basic Architecture and Performance Metrics
    1. 1.1 Basics of Analog‐to‐Digital Conversion
    2. 1.2 Sigma‐Delta Modulation
    3. 1.3 The First‐order Modulator
    4. 1.4 Performance Enhancement and Taxonomy of Ms
    5. 1.5 Putting All The Pieces Together: From Ms to ADCs
    6. 1.6 DACs
    7. 1.7 Summary
    8. References
  7. Chapter 2: Taxonomy of Architectures
    1. 2.1 Second‐order Modulators
    2. 2.2 High‐order Single‐loop Ms
    3. 2.3 Cascade Modulators
    4. 2.4 Multi‐bit Modulators
    5. 2.5 Band‐pass Modulators
    6. 2.6 Continuous‐time Modulators: Architecture and Basic Concepts
    7. 2.7 DT–CT Transformation of Ms
    8. 2.8 Direct Synthesis of CT‐ Ms
    9. 2.9 Summary
    10. References
  8. Chapter 3: Circuit Errors in Switched‐capacitor Modulators
    1. 3.1 Overview of Nonidealities in Switched‐capacitor Modulators
    2. 3.2 Finite Amplifier Gain in SC‐ Ms
    3. 3.3 Capacitor Mismatch in SC‐ Ms
    4. 3.4 Integrator Settling Error in SC‐ Ms
    5. 3.5 Circuit Noise in SC‐ Ms
    6. 3.6 Clock Jitter in SC‐ Ms
    7. 3.7 Sources of Distortion in SC‐ Ms
    8. 3.8 Case Study: High‐level Sizing of a M
    9. 3.9 Summary
    10. References
  9. Chapter 4: Circuit Errors and Compensation Techniques in Continuous‐time Modulators
    1. 4.1 Overview of Nonidealities in Continuous‐time Modulators
    2. 4.2 CT Integrators and Resonators
    3. 4.3 Finite Amplifier Gain in CT‐ Ms
    4. 4.4 Time‐constant Error in CT‐ Ms
    5. 4.5 Finite Integrator Dynamics in CT‐ Ms
    6. 4.6 Sources of Distortion in CT‐ Ms
    7. 4.7 Circuit Noise in CT‐ Ms
    8. 4.8 Clock Jitter in CT‐ Ms
    9. 4.9 Excess Loop Delay in CT‐ Ms
    10. 4.10 Quantizer Metastability in CT‐ Ms
    11. 4.11 Summary
    12. References
  10. Chapter 5: Behavioral Modeling and High‐level Simulation
    1. 5.1 Systematic Design Methodology of Modulators
    2. 5.2 Simulation Approaches for the High‐level Evaluation of Ms
    3. 5.3 Implementing M Behavioral Models
    4. 5.4 Efficient Behavioral Modeling of M Building Blocks using C‐MEX S‐functions
    5. 5.5 SIMSIDES: A SIMULINK‐based Behavioral Simulator for Ms
    6. 5.6 Using SIMSIDES for High‐level Sizing and Verification of Ms
    7. 5.7 Summary
    8. References
  11. Chapter 6: Automated Design and Optimization of Ms
    1. 6.1 Architecture Exploration and Selection: Schreier's Toolbox
    2. 6.2 Optimization‐based High‐level Synthesis of Modulators
    3. 6.3 Lifting Method and Hardware Acceleration to Optimize CT‐ Ms
    4. 6.4 Using Multi‐objective Evolutionary Algorithms to Optimize Ms
    5. 6.5 Summary
    6. References
  12. Chapter 7: Electrical Design of Ms: From Systems to Circuits
    1. 7.1 Macromodeling Ms
    2. 7.2 Examples of M Macromodels
    3. 7.3 Including Noise in Transient Electrical Simulations of Ms
    4. 7.4 Processing M Output Results of Electrical Simulations
    5. 7.5 Summary
    6. References
  13. Chapter 8: Design Considerations of M Subcircuits
    1. 8.1 Design Considerations of CMOS Switches
    2. 8.2 Design Considerations of Operational Amplifiers
    3. 8.3 Design Considerations of Transconductors
    4. 8.4 Design Considerations of Comparators
    5. 8.5 Design Considerations of Current‐Steering DACs
    6. 8.6 Summary
    7. References
  14. Chapter 9: Practical Realization of Ms: From Circuits to Chips
    1. 9.1 Auxiliary M Building Blocks
    2. 9.2 Layout Design, Floorplanning, and Practical Issues
    3. 9.3 Chip Package, Test PCB, and Experimental Setup
    4. 9.4 Experimental Test Set‐Up
    5. 9.5 M Design Examples and Case Studies
    6. 9.6 Summary
    7. References
  15. Chapter 10: Frontiers, Trends and Challenges: Towards Next‐generation Modulators
    1. 10.1 State‐of‐the‐Art ADCs: Nyquist‐rate versus Converters
    2. 10.2 Comparison of Different Categories of ADCs
    3. 10.3 Empirical and Statistical Analysis of State‐of‐the‐Art Ms
    4. 10.4 Gigahertz‐range Ms for RF‐to‐digital Conversion
    5. 10.5 Enhanced Cascade Ms
    6. 10.6 Power‐efficient M Loop‐filter Techniques
    7. 10.7 Hybrid M/Nyquist‐rate ADCs
    8. 10.8 Time‐based ADCs
    9. 10.9 DAC Techniques for High‐performance CT‐ Ms
    10. 10.10 Classification of State‐of‐the‐Art References
    11. 10.11 Summary and Conclusions
    12. References
  16. Appendix A: State‐space Analysis of Clock Jitter in CT‐ΣΔMs
    1. A.1 State‐space Representation of
    2. A.2 Expectation Value of
    3. A.3 In‐band Noise Power due to Clock Jitter
    4. References
  17. Appendix B: SIMSIDES User Guide
    1. B.1 Getting Started: Installing and Running SIMSIDES
    2. B.2 Building and Editing M Architectures in SIMSIDES
    3. B.3 Analyzing Ms in SIMSIDES
    4. B.4 Optimization Interface
    5. B.5 Tutorial Example: Using SIMSIDES to Model and Analyze Ms
    6. B.6 Getting Help
  18. Appendix C: SIMSIDES Block Libraries and Models
    1. C.1 Overview of SIMSIDES Libraries
    2. C.2 Ideal Libraries
    3. C.3 Real SC Building‐Block Libraries
    4. C.4 Real SI Building‐Block Libraries
    5. C.5 Real CT Building‐Block Libraries
    6. C.6 Real Quantizers & Comparators
    7. C.7 Real D/A Converters
    8. C.8 Auxiliary Blocks
  19. Index
  20. End User License Agreement

Product information

  • Title: Sigma-Delta Converters: Practical Design Guide, 2nd Edition
  • Author(s): Jose M. de la Rosa
  • Release date: November 2018
  • Publisher(s): Wiley-IEEE Press
  • ISBN: 9781119275787