Skip to Main Content
Switch/Router Architectures
book

Switch/Router Architectures

by Dr. James Aweya
June 2018
Intermediate to advanced content levelIntermediate to advanced
336 pages
10h 25m
English
Wiley-IEEE Press
Content preview from Switch/Router Architectures

13Case Study: Quality of Service Processing in the Cisco Catalyst 6000 and 6500 Series Switches

13.1 Introduction

The key QoS functions in the Catalyst 6000/6500 family of switch/routers requiring real-time processing are implemented in hardware. These QoS-related hardware components are implemented on Catalyst 6000/6500 modules such as the Policy Feature Card (PFC) and the port ASICs on the line cards. This chapter describes the QoS capabilities of the PFC and the switch/router port ASICs on the line cards [CISCUQSC06,CISCUQSC09].

The Multilayer Switch Feature Card (MSFC) supports some QoS functions such as control plane policing and other rate-limiting functions for control and management traffic. These special QoS functions are not discussed in this chapter. Detailed descriptions of the PFC and MSFC are given in Chapters 7 and 9.

13.2 Policy Feature Card (PFC)

The PFC1 is a daughter card that is supported only on the Supervisor Engine 1A of the Catalyst 6000/6500 family. The PFC2 is an improved design of the PFC1 and is supported on Supervisor Engine 2. PFC1 and PFC2 are the primary modules on which the hardware-based QoS functions are implemented for Supervisor Engine 1 and 2, respectively. Supervisor Engine 32 supports the PFC3B and MSFC2a as a default configuration. Supervisor Engines 720, 720-3B, and 720-3BXL all support PFC3 and MSFC3. The newer generations of the PFC support more advanced QoS functions than the older ones.

13.2.1 Policing in the PFC

In addition ...

Become an O’Reilly member and get unlimited access to this title plus top books and audiobooks from O’Reilly and nearly 200 top publishers, thousands of courses curated by job role, 150+ live events each month,
and much more.
Start your free trial

You might also like

Software Architect’s Handbook

Software Architect’s Handbook

Joseph Ingeno
Interconnection Networks

Interconnection Networks

Jose Duato, Sudhakar Yalamanchili, Lionel Ni
Algebraic and Stochastic Coding Theory

Algebraic and Stochastic Coding Theory

Dave K. Kythe, Prem K. Kythe

Publisher Resources

ISBN: 9781119486152Purchase book