3Shared-Bus and Shared-Memory-Based Switch/Router Architectures
3.1 Architectures with Bus-Based Switch Fabrics and Centralized Forwarding Engines
The first generation of router and switch/router designs has relied upon centralized processing and shared memory for forwarding and buffering packets, respectively. These designs have traditionally been based on a shared bus switch fabric. In such designs, all packets received from all interfaces are written to a common memory pool.
After forwarding decisions are made, packets are then read from this shared memory and sent to the appropriate output interface(s). Even a majority of today's low-end or small-capacity systems (residential and small enterprise routers and switch/routers) still adopt this design. The simplicity and requirements of these systems make the shared-bus, shared-processor, and shared-memory architecture a natural fit.
Examples of this category of switch/router architectures are listed below. These example architectures are still in common use today and very much contemporary even though some were developed more than a decade ago. The goal here is to use these designs to highlight the main architectural approaches adopted and concepts developed over the years.
Example Architectures
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