1. Krambeck R, Lee C, Law H. High speed compact circuits with CMOS. IEEE JSSC. 1982;SC-17(3):614–619.

2. P. Gronowski, B. Bowhill, Dynamic logic and latches—part II, in: Proceedings VLSI, Circuits Workshop (VLSI Symposium), June 1996.

3. Kernhof, Selzer, Beunder, Hoefflinger, Laquai, Schindler. Mixed static and domino logic on the CMOS gate forest. IEEE JSSC. 1990;25(2):396–402.

4. T. Williams, Dynamic logic: clocked and asynchronous, in: IEEE International Solid State Circuits Conference Tutorial, 1996, pp. 1–24.

5. Svensson, Yuan. High speed CMOS circuit technique. IEEE JSSC. 1989;24(1):62–70.

6. Weste, Eshraghian. Principles of CMOS VLSI Design second ed. Addison-Wesley 1993; pp. 290–291, 301–303, 308–311.

7. Bakoglu H. Circuits, ...

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